What does VHDL means?

VHDL  is a hardware description language used in electronic design automation to describe digital and mixed-signal systems such as field-programmable gate arrays and integrated circuits.

VHDL stands for "Verilog hardware description language". Which is used to compact the size and increase the efficiency of the circuit.

its a VHSIC harware description language .used in electronic design automation to describe digital and mixed signal system.

vhdl is a hardware descriptive language like verilog used in electronic designing

usually we use vhdl in fpga to perform any function. Amoung verilog and vhdl we prefer verilog because verilog is easy as compared to vhdl

The language of designing devices of modern computer systems.

VHSIC Hardware Description Language

VHDL is a VHSIC(Very high Speed Integrated circuit) hardware description language used to design the program on the hardware with the help of gate array.

VHDL - VHIC HDL - Very high speed integrated circuit hardware description language

VHDl means verilog hardware discription language for vlsi design system.

It means Very High speed integrated circuit hardware Description Language

VHSIC Hardware Description Language